Sireesha Balla
VLSI Design and Verification Trainee
Education
BTech
2018
Electronics and Communication Engineering
Work & Experience
VLSI Design and Verification Trainee
January 23, 2019
Maven Silicon Institute
I have a knowledge on the skills like Verilog, System Verilog, UVM, Functional Coverage, Code Coverage, FSM based Design, Assertions, STA, ASIC Design flow, FPGA, Basic Electronics. I have knowledge on real time protocols like SPI both Design and Verification, Router 1×3 both Design and Verification and AXI Verification.
